Chapter 29: Semiconductor Electronics: Materials, Devices and Simple Circuits

Introduction

Overview

• Electronic circuits use devices controlling electron flow.
• Before transistors, vacuum tubes (diode, triode, tetrode, pentode) were used.
• Vacuum tubes are bulky, consume high power, operate at ~100 V, have limited life and low reliability.
• Modern solid-state semiconductors control charge carrier flow via junctions.
• Light, heat, or small voltage can change mobile charge carriers in semiconductors.
• CRT monitors replaced by LCD due to semiconductor development.

Classification of Metals, Conductors and Semiconductors

• Materials classified by electrical conductivity: Metals, Semiconductors, Insulators.
• Conductivity (σ) measures ease of electric current flow.
• Metals: High conductivity, electricity flows easily.
• Semiconductors: Medium conductivity, moderate current flow.
• Insulators: Very low conductivity, almost no current flow.
• Conductivity and resistivity (ρ) are inversely related.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 J = 2.49 eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = 1/2mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Energy Bands of Solids

Valence Band

• Contains valence electrons.
• Partially or fully filled.
• Electrons here do not conduct current.

Conduction Band

• Electrons rarely present or partially filled.
• Contains free electrons contributing to current.

Forbidden Energy Gap

• Energy gap between valence and conduction bands.
• No electrons present in this gap.
• Energy band gap formula: E_g = hν = hc/λ
• Where h = Planck's constant, c = speed of light, λ = wavelength.
• Band gap depends on temperature.

Fermi Energy

• Maximum energy of free electrons at 0 K.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 J = 2.49 eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = 1/2mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Energy Bands Classification

Metals

• Conduction band partially filled or overlaps valence band.
• No forbidden energy gap.

Insulators

• Valence band fully filled, conduction band empty.
• Wide forbidden gap > 5 eV.

Semiconductors

• Valence band full, conduction band empty.
• Small forbidden gap ~1 eV (Si: 1.1 eV, Ge: 0.72 eV).
• At 0 K, behave as insulators.

Solved Examples

• Ex 1: Identify material with overlapping bands.
  • Answer: Metal.
• Ex 2: Material with band gap 1.1 eV?
  • Answer: Silicon (semiconductor).

Practice Set

• Q1: Which has no band gap?
  • A. Metal
  • B. Semiconductor
  • C. Insulator
  • D. None
• Q2: Band gap of insulator is?
  • A. < 1 eV
  • B. ~1 eV
  • C. > 5 eV
  • D. 0 eV
• Q3: Band gap of germanium?
  • A. 0.72 eV
  • B. 1.1 eV
  • C. 5 eV
  • D. 0 eV

Answer Key

• Q1: A - Metals have overlapping bands, no gap.
• Q2: C - Insulators have band gap > 5 eV.
• Q3: A - Germanium band gap is 0.72 eV.

Memory Aids

• Metal: Overlapping bands, no gap.
• Insulator: Large gap > 5 eV.
• Semiconductor: Small gap ~1 eV.

Hole

Definition and Properties

• Positive charge carrier in semiconductors.
• Created when electron leaves covalent bond.
• Charge equal in magnitude to electron but positive.
• Mobility less than electron.

Solved Examples

• Ex 1: What charge does a hole carry?
  • Answer: Positive charge equal to electron charge.

Practice Set

• Q1: Hole is?
  • A. Negative charge carrier
  • B. Positive charge carrier
  • C. Neutral particle
  • D. Electron
• Q2: Hole mobility compared to electron is?
  • A. Greater
  • B. Equal
  • C. Smaller
  • D. Zero
• Q3: Hole is created when?
  • A. Electron breaks covalent bond
  • B. Electron recombines
  • C. Electron moves in conduction band
  • D. Electron is created

Answer Key

• Q1: B - Hole carries positive charge.
• Q2: C - Hole mobility is smaller than electron.
• Q3: A - Hole created when electron leaves covalent bond.

Memory Aids

• Hole = positive charge carrier.
• Mobility: electron > hole.
• Created by electron leaving bond.

Intrinsic Semiconductor

Definition and Examples

• Pure semiconductor without impurities is intrinsic semiconductor.
• Examples: Silicon (Si), Germanium (Ge).

Carrier Concentration

• Electron density in conduction band, n_e.
• Hole density in valence band, n_h.
• Intrinsic carrier concentration, n_i.
• In intrinsic semiconductor, n_e = n_h = n_i.

Current in Intrinsic Semiconductor

• Electrons and holes move in opposite directions under electric field.
• Total current, I = I_e + I_h, where I_e is electron current, I_h is hole current.
• Current formula: I = n_ieA(v_e + v_h), where A is cross-sectional area, v_e, v_h are drift velocities.

Conductivity and Resistivity

• Conductivity, σ = n_ie(μ_e + μ_h), where μ_e, μ_h are mobilities of electrons and holes.
• Resistivity, ρ = 1/σ = 1/(e n_i(μ_e + μ_h)).

Temperature Effect

• Increasing temperature increases electron-hole pair density.
• Conductivity increases with temperature.
• Resistivity decreases with temperature.
• Semiconductors have negative temperature coefficient of resistance.

Crystal Structure and Hole Motion

• Si or Ge atoms form covalent bonds with 4 neighbors (+4 core charge).
• At low temperature, all bonds intact.
• Electron movement creates holes that appear to move through the lattice.

Solved Examples

• Ex 1: Calculate conductivity if n_i = 1 × 10¹⁶ m^-3, μ_e = 0.14 m²/V·s, μ_h = 0.05 m²/V·s, and e = 1.6 × 10^-19 C.
  • σ = n_ie(μ_e + μ_h) = 1 × 10¹⁶ × 1.6 × 10^-19 × (0.14 + 0.05) = 3.04 × 10^-3 S/m.
• Ex 2: Find resistivity ρ from above data.
  • ρ = 1/σ = 1 / 3.04 × 10^-3 = 329.0 Ω·m.

Practice Set

• Q1: What is the relation between electron and hole densities in intrinsic semiconductor?
  • A) n_e > n_h
  • B) n_e < n_h
  • C) n_e = n_h = n_i
  • D) None of these
• Q2: Conductivity σ of intrinsic semiconductor depends on?
  • A) Carrier concentration and mobility
  • B) Only carrier concentration
  • C) Only mobility
  • D) Temperature only
• Q3: If intrinsic carrier concentration doubles, what happens to conductivity?
  • A) Halves
  • B) Doubles
  • C) Quadruples
  • D) No change

Answer Key

• Q1: C - Electron and hole densities are equal in intrinsic semiconductor.
• Q2: A - Conductivity depends on carrier concentration and their mobilities.
• Q3: C - Conductivity σ = n_ie(μ_e + μ_h), doubling n_i doubles σ, so quadruples conductivity.

Memory Aids

• Intrinsic: Pure, no impurities.
• n_e = n_h = n_i always equal.
• Conductivity σ = n_ie(μ_e + μ_h).
• Resistivity inversely proportional to conductivity.
• Conductivity increases with temperature.

Energy Band Diagram

Band Structure at Different Temperatures

• At T=0 K, valence band (VB) full, conduction band (CB) empty.
• Intrinsic semiconductor behaves like insulator at 0 K.
• At T>0 K, electrons gain thermal energy, jump from VB to CB.
• Equal number of holes created in VB.
• Electrons occupy lowest energy levels in CB.
• Number of electrons in CB equals number of holes in VB.

Solved Examples

• Ex 1: At 0 K, what is the conductivity of intrinsic semiconductor?
  • Zero, as no free electrons in conduction band.
• Ex 2: Why does conductivity increase with temperature?
  • Thermal energy excites electrons to conduction band, increasing free carriers.

Practice Set

• Q1: At 0 K, intrinsic semiconductor behaves as?
  • A) Conductor
  • B) Insulator
  • C) Semiconductor
  • D) Superconductor
• Q2: What causes holes in valence band?
  • A) Electron excitation to conduction band
  • B) Electron recombination
  • C) Impurity doping
  • D) None of these
• Q3: Number of electrons in conduction band equals?
  • A) Number of holes in valence band
  • B) Number of atoms
  • C) Number of impurities
  • D) Zero

Answer Key

• Q1: B - At 0 K, no free electrons, acts as insulator.
• Q2: A - Holes created by electron excitation to conduction band.
• Q3: A - Electrons in CB equal holes in VB.

Memory Aids

• At 0 K, no conduction.
• Thermal energy creates electron-hole pairs.
• Electron-hole pairs enable conductivity.

Extrinsic Semiconductor

Concepts

• Impure semiconductor with added impurities is called extrinsic semiconductor.
• Doping: Adding small amounts of impurities with different valency to pure semiconductor.
• Impurities increase mobile electrons or holes, enhancing conductivity.
• Two types: n-type (pentavalent impurities) and p-type (trivalent impurities).
• Energy bands affected by donor (n-type) or acceptor (p-type) levels.

Solved Examples

• Ex 1: Calculate the effect of doping on conductivity if donor atoms increase free electrons by 10¹⁵ cm^-3.
• Step 1: Identify donor density N_d = 10¹⁵ cm^-3.
• Step 2: Free electron concentration n_e ≈ N_d = 10¹⁵ cm^-3.
• Step 3: Conductivity increases proportionally to n_e.

Practice Set

• Q1: What is doping in semiconductors?
  • A. Removing impurities
  • B. Adding impurities to increase conductivity
  • C. Heating semiconductor
  • D. Cooling semiconductor
• Q2: Which impurity type is used for n-type semiconductor?
  • A. Trivalent
  • B. Pentavalent
  • C. Tetravalent
  • D. Hexavalent
• Q3: In extrinsic semiconductors, what mainly increases conductivity?
  • A. Holes in n-type
  • B. Electrons in p-type
  • C. Electrons in n-type
  • D. Holes in intrinsic

Answer Key

• Q1: B - Doping means adding impurities to increase conductivity.
• Q2: B - Pentavalent impurities create n-type semiconductors.
• Q3: C - Electrons are majority carriers in n-type, increasing conductivity.

Memory Aids

• Doping = Adding impurities to increase charge carriers.
• n-type = Negative charge carriers (electrons) from pentavalent donors.
• p-type = Positive charge carriers (holes) from trivalent acceptors.

n-type Semiconductor

Concepts

• Pure Si or Ge (tetravalent) doped with group V pentavalent impurities (As, Sb, P).
• Donor atoms donate one free electron for conduction.
• Conduction due to electrons (negative charge carriers).
• Majority carriers: electrons; minority carriers: holes.
• Charge neutrality maintained.
• Electron concentration: n_e ≈ N_d ≫ n_h, where N_d = donor density.

Solved Examples

• Ex 1: Find majority carrier concentration if donor density N_d = 5 × 10¹⁶ cm^-3.
• Step 1: Majority carrier concentration n_e ≈ N_d = 5 × 10¹⁶ cm^-3.
• Step 2: Minority carrier concentration n_h is negligible.

Practice Set

• Q1: What type of impurity is used in n-type semiconductor?
  • A. Trivalent
  • B. Pentavalent
  • C. Tetravalent
  • D. Divalent
• Q2: Majority carriers in n-type semiconductor are?
  • A. Holes
  • B. Electrons
  • C. Ions
  • D. Neutrons
• Q3: If donor density N_d = 10¹⁵ cm^-3, what is electron concentration?
  • A. 10¹⁴ cm^-3
  • B. 10¹⁵ cm^-3
  • C. 10¹⁶ cm^-3
  • D. 10¹³ cm^-3

Answer Key

• Q1: B - Pentavalent impurities are used in n-type doping.
• Q2: B - Electrons are majority carriers in n-type semiconductor.
• Q3: B - Electron concentration equals donor density N_d.

Memory Aids

• n-type = Negative charge carriers (electrons).
• Donor atoms = Pentavalent impurities.
• Electron concentration n_e ≈ N_d.

p-type Semiconductor

Concepts

• Pure Si or Ge doped with group III trivalent impurities (Al, B, In).
• Acceptor atoms create holes (positive charge carriers).
• Conduction due to holes.
• Majority carriers: holes; minority carriers: electrons.
• Charge neutrality maintained.
• Hole concentration: n_h ≈ N_a ≫ n_e, where N_a = acceptor density.

Solved Examples

• Ex 1: Calculate hole concentration if acceptor density N_a = 2 × 10¹⁶ cm^-3.
• Step 1: Hole concentration n_h ≈ N_a = 2 × 10¹⁶ cm^-3.
• Step 2: Electron concentration n_e is negligible.

Practice Set

• Q1: What type of impurity is used in p-type semiconductor?
  • A. Pentavalent
  • B. Trivalent
  • C. Tetravalent
  • D. Hexavalent
• Q2: Majority carriers in p-type semiconductor are?
  • A. Electrons
  • B. Holes
  • C. Ions
  • D. Neutrons
• Q3: If acceptor density N_a = 10¹⁵ cm^-3, what is hole concentration?
  • A. 10¹⁴ cm^-3
  • B. 10¹⁵ cm^-3
  • C. 10¹⁶ cm^-3
  • D. 10¹³ cm^-3

Answer Key

• Q1: B - Trivalent impurities are used in p-type doping.
• Q2: B - Holes are majority carriers in p-type semiconductor.
• Q3: B - Hole concentration equals acceptor density N_a.

Memory Aids

• p-type = Positive charge carriers (holes).
• Acceptor atoms = Trivalent impurities.
• Hole concentration n_h ≈ N_a.

p-n Junction

Formation and Charge Distribution

• Free electrons from n-type diffuse to p-type, filling holes.
• Positive charge layer forms on n-side; negative charge layer on p-side.
• Charge layers form quickly, stopping further carrier movement.
• Potential difference (V₀) of 0.1–0.3 V (Ge: 0.3 V, Si: 0.7 V) forms as a barrier.
• Depletion layer: thin region with immobile charges around junction.

Currents in p-n Junction

• Diffusion current: Holes diffuse p → n; electrons diffuse n → p due to concentration difference.
• Drift current: Minority carriers move across barrier due to potential, creating drift current.

Electric Field

• Electric field intensity, E = V/d, where V is potential barrier and d is depletion width.

Solved Examples

• Ex 1: Calculate electric field if V₀ = 0.7 V and d = 2 × 10^-6 m.
  • Use E = V/d = 0.7/(2 × 10^-6) = 3.5 × 10⁵ V/m.

Practice Set

• Q1: What is the typical potential barrier for silicon p-n junction?
  • A) 0.1 V
  • B) 0.3 V
  • C) 0.7 V
  • D) 1.0 V
• Q2: Which current is due to minority carriers moving across the junction?
  • A) Diffusion current
  • B) Drift current
  • C) Both currents
  • D) None
• Q3: If the depletion width is 1 × 10^-6 m and barrier potential is 0.3 V, what is the electric field intensity?
  • A) 3 × 10⁵ V/m
  • B) 3 × 10⁴ V/m
  • C) 3 × 10⁶ V/m
  • D) 3 × 10³ V/m

Answer Key

• Q1: C - Silicon p-n junction barrier is typically 0.7 V.
• Q2: B - Drift current is due to minority carriers moving across the barrier.
• Q3: A - E = V/d = 0.3 / 1 × 10^-6 = 3 × 10⁵ V/m.

Memory Aids

• Potential barrier: Ge ~0.3 V, Si ~0.7 V.
• Diffusion current: majority carriers move due to concentration gradient.
• Drift current: minority carriers move due to electric field.
• Electric field: E = V/d.

Semiconductor Diode

Basic Concept

• A semiconductor diode is a p-n junction with metallic contacts for external voltage application.
• Current flows mainly from p-side to n-side under forward bias (arrow direction shows conventional current).
• Equilibrium barrier potential changes with applied external voltage V.

Structure and Symbol

• Formed by joining p-type and n-type semiconductors.
• Depletion region at junction acts as a barrier to current.
• Metallic contacts connect diode to circuit.
• Symbol shows arrow indicating forward current direction.

Solved Examples

Ex 1

• Identify the direction of current flow in a given diode symbol: Current flows from p to n side (arrow direction).
• Apply external voltage to alter barrier potential and observe current change.

Practice Set

• Q1: What does the arrow in a diode symbol indicate?
  • A) Electron flow direction
  • B) Conventional current direction
  • C) Voltage polarity
  • D) Depletion region width
• Q2: What forms the depletion region in a semiconductor diode?
  • A) Metallic contacts
  • B) Junction of p and n regions
  • C) External voltage
  • D) Battery connection
• Q3: Applying forward bias to a diode does what to the barrier potential?
  • A) Increases it
  • B) Decreases it
  • C) No change
  • D) Removes it completely

Answer Key

• Q1: B - Arrow shows conventional current flow direction under forward bias.
• Q2: B - Depletion region forms at the p-n junction.
• Q3: B - Forward bias reduces the barrier potential allowing current flow.

Memory Aids

• Arrow in diode symbol = conventional current direction.
• Depletion region = barrier to current at p-n junction.
• Forward bias lowers barrier potential, enabling conduction.

Biasing of p-n Junction

Unbiased Junction

• No external voltage applied.
• Built-in electric field exists due to voltage rise from p to n side.
• Diffusion current i_df and drift current i_dr balance each other.
• Net current i_net = 0.

Forward Bias

• Positive terminal connected to p-side, negative to n-side.
• Barrier potential decreases, depletion width narrows.
• Low resistance at junction, high current flows.
• Net current i_net flows forward.

Reverse Bias

• Positive terminal connected to n-side, negative to p-side.
• Barrier potential increases, depletion width widens.
• High resistance at junction, very low current (leakage current) flows.
• Net current i_net ≈ 0, blocks current flow.

Solved Examples

Ex 1

• Determine the effect of forward bias on depletion width: It decreases.
• Determine the effect of reverse bias on barrier potential: It increases.

Practice Set

• Q1: What happens to the depletion width under forward bias?
  • A) Increases
  • B) Decreases
  • C) No change
  • D) Becomes zero
• Q2: Under reverse bias, the current through the diode is:
  • A) High
  • B) Zero
  • C) Very low (leakage)
  • D) Same as forward bias
• Q3: In reverse bias, the barrier potential:
  • A) Decreases
  • B) Increases
  • C) Remains constant
  • D) Is zero

Answer Key

• Q1: B - Forward bias narrows the depletion region.
• Q2: C - Reverse bias allows only a tiny leakage current.
• Q3: B - Barrier potential increases under reverse bias.

Memory Aids

• Forward bias = barrier down, depletion narrows, current flows.
• Reverse bias = barrier up, depletion widens, current blocked.
• Net current zero when unbiased.

I-V Characteristic of Diode

Measurement Setup

• Diode connected with battery, voltmeter, and current meter (milliammeter or microammeter).
• Switch controls circuit ON/OFF.
• Milliammeter measures higher currents; microammeter measures very low currents.

Current Equation

• Current through diode: I = I₀ [e^eV/nkT - 1]
• Where n = 1 for Ge, n = 2 for Si.
• I₀ is the reverse saturation current.
• Dynamic resistance: r_d = ΔV/ΔI
• Static (dc) resistance: r_dc = V/I

Zener Diode Characteristics

• Forward bias: Current rises rapidly after knee voltage.
• Reverse bias: Small leakage current until breakdown voltage V_Z.
• At V_Z, current increases sharply (Zener effect) without damage.
• Used for voltage regulation.

Solved Examples

Ex 1

• Calculate current for given V using I = I₀ [e^eV/nkT - 1].
• Determine dynamic resistance from ΔV and ΔI values.

Practice Set

• Q1: In the diode current equation, n equals:
  • A) 1 for Si, 2 for Ge
  • B) 2 for Si, 1 for Ge
  • C) 1 for both
  • D) 2 for both
• Q2: Dynamic resistance r_d is defined as:
  • A) V/I
  • B) ΔV / ΔI
  • C) I/V
  • D) V × I
• Q3: At Zener breakdown voltage, the diode:
  • A) Blocks current
  • B) Allows large reverse current without damage
  • C) Behaves like a resistor
  • D) Stops conducting

Answer Key

• Q1: B - n=2 for Si, n=1 for Ge.
• Q2: B - Dynamic resistance is ΔV / ΔI.
• Q3: B - Zener diode allows large reverse current at breakdown voltage.

Memory Aids

• Current formula: exponential growth with voltage.
• Dynamic resistance = slope of I-V curve.
• Zener diode stabilizes voltage at breakdown point.

Application of Junction Diode as a Rectifier

Rectifier

• Converts AC voltage to DC voltage.
• Uses diode based on forward bias conduction and reverse bias non-conduction.

Half wave rectifier

• Diode conducts during positive half cycle only.
• Output is unidirectional pulsating DC.
• Output frequency = input frequency.

Full wave rectifier

• Rectifies both positive and negative halves of AC input.
• Uses two diodes and transformer with center tap.
• Output frequency = 2 × input frequency.
• Output is smoother pulsating DC than half wave.

Solved Examples

• Ex 1: Calculate output frequency of full wave rectifier if input frequency is 50 Hz.
  Solution: Output frequency = 2 × 50 = 100 Hz.
• Ex 2: What is the output frequency of half wave rectifier for 60 Hz input?
  Solution: Output frequency = 60 Hz.

Practice Set

• Q1: What does a rectifier do?
  A. Converts DC to AC
  B. Converts AC to DC
  C. Amplifies AC
  D. Blocks AC
  
• Q2: In half wave rectification, diode conducts during:
  A. Negative half cycle
  B. Positive half cycle
  C. Both half cycles
  D. None
• Q3: Output frequency of full wave rectifier for 50 Hz input is:
  A. 25 Hz
  B. 50 Hz
  C. 100 Hz
  D. 200 Hz

Answer Key

• Q1: B - Rectifier converts AC voltage to DC voltage.
• Q2: B - Diode conducts only during positive half cycle in half wave rectifier.
• Q3: C - Full wave rectifier output frequency is twice the input frequency.

Memory Aids

• Half wave: Conducts half cycle, output freq = input freq.
• Full wave: Conducts both halves, output freq = 2 × input freq.
• Rectifier = AC to DC converter.

Special Purpose p-n Junction Diodes

Zener diode

• Heavily doped p-n junction diode.
• Operates in reverse bias.
• Zener voltage remains constant over wide current range.
• Used as voltage regulator.

Zener diode as voltage regulator

• Voltage across Zener diode remains constant despite input voltage changes.
• Voltage drop across series resistor changes to maintain constant voltage.

Solved Examples

• Ex 1: If input voltage increases, what happens to voltage across Zener diode?
  Solution: Voltage across Zener diode remains constant.
• Ex 2: What is the role of series resistor in Zener voltage regulator?
  Solution: It drops excess voltage to maintain constant Zener voltage.

Practice Set

• Q1: Zener diode operates in:
  A. Forward bias
  B. Reverse bias
  C. Both
  D. None
• Q2: Zener voltage is:
  A. Variable with current
  B. Constant over wide current range
  C. Zero
  D. Negative
• Q3: In Zener voltage regulator, if input voltage increases:
  A. Zener voltage increases
  B. Voltage across series resistor increases
  C. Load voltage increases
  D. Zener diode stops conducting

Answer Key

• Q1: B - Zener diode is operated in reverse bias.
• Q2: B - Zener voltage remains constant over wide current range.
• Q3: B - Voltage across series resistor increases to keep Zener voltage constant.

Memory Aids

• Zener diode = voltage regulator diode.
• Constant voltage = Zener voltage.
• Series resistor protects diode by dropping excess voltage.

Photodiode

Photodiode basics

• Special p-n junction diode with transparent window.
• Operated under reverse bias.
• Generates electron-hole pairs when illuminated with photon energy > semiconductor band gap.
• Produces photocurrent proportional to light intensity.

Photodiode symbol and I-V characteristics

• Forward bias: current increases sharply after knee voltage.
• Reverse bias: very low current until breakdown voltage.
• Illumination increases reverse current (photocurrent).

Photodiode under illumination

• Light generates electron-hole pairs near depletion region.
• Photocurrent flows in reverse bias circuit.
• Current increases with light intensity.

Solved Examples

• Ex 1: What happens to photocurrent if light intensity increases?
  Solution: Photocurrent increases proportionally.
• Ex 2: Why is photodiode operated in reverse bias?
  Solution: To increase depletion region width and reduce dark current.

Practice Set

• Q1: Photodiode is operated in:
  A. Forward bias
  B. Reverse bias
  C. Both
  D. None
• Q2: Photocurrent increases with:
  A. Voltage only
  B. Light intensity
  C. Temperature
  D. Resistance
• Q3: Photodiode generates electron-hole pairs when:
  A. Photon energy < band gap
  B. Photon energy > band gap
  C. No light
  D. Forward bias only

Answer Key

• Q1: B - Photodiode is operated under reverse bias.
• Q2: B - Photocurrent is proportional to light intensity.
• Q3: B - Electron-hole pairs generated when photon energy exceeds band gap.

Memory Aids

• Photodiode = light-sensitive diode.
• Reverse bias operation for photocurrent.
• Photocurrent ∝ light intensity.

Light Emitting Diode

LED basics

• Converts electrical energy into light energy.
• Heavily doped p-n junction diode.
• Emits light under forward bias by spontaneous radiation.
• Threshold voltage higher than Si diode, varies by color.
• Reverse breakdown voltage ~5 V (low).
• Made from GaAsP for colors, GaAs for infrared.

Solved Examples

• Ex 1: What happens when LED is forward biased?
  Solution: LED emits light.
• Ex 2: Which material is used for infrared LED?
  Solution: Gallium arsenide (GaAs).

Practice Set

• Q1: LED emits light when:
  A. Reverse biased
  B. Forward biased
  C. No bias
  D. Both biases
• Q2: Typical reverse breakdown voltage of LED is:
  A. 0.7 V
  B. 5 V
  C. 12 V
  D. 50 V
• Q3: Material used for colored LEDs is:
  A. Silicon
  B. Gallium arsenide phosphide
  C. Germanium
  D. Copper

Answer Key

• Q1: B - LED emits light under forward bias.
• Q2: B - Reverse breakdown voltage of LED is about 5 V.
• Q3: B - GaAsP is used for colored LEDs.

Memory Aids

• LED = Light from forward bias.
• GaAsP for colors, GaAs for IR.
• Low reverse breakdown voltage (~5 V).

Solar Cell

Solar cell basics

• Converts solar energy into electrical energy.
• p-n junction generates emf when illuminated.
• Works on photovoltaic effect (like photodiode without external bias).
• Large junction area for higher power.

Solar cell I-V characteristics

• Short circuit current I_sc: max current at zero voltage.
• Open circuit voltage V_oc: max voltage at zero current.
• Current decreases as voltage increases between these points.

Solved Examples

• Ex 1: What is I_sc in solar cell?
  Solution: Maximum current when voltage is zero.
• Ex 2: What is V_oc in solar cell?
  Solution: Maximum voltage when current is zero.

Practice Set

• Q1: Solar cell converts:
  A. Electrical to solar energy
  B. Solar to electrical energy
  C. Heat to electrical energy
  D. Electrical to heat energy
• Q2: Photovoltaic effect means:
  A. Current flows without light
  B. emf generated by light on p-n junction
  C. emf generated by heat
  D. emf generated by magnetic field
• Q3: In solar cell, V_oc is:
  A. Voltage at max current
  B. Voltage at zero current
  C. Current at zero voltage
  D. Current at max voltage

Answer Key

• Q1: B - Solar cell converts solar energy to electrical energy.
• Q2: B - Photovoltaic effect is emf generation by light on p-n junction.
• Q3: B - V_oc is voltage at zero current.

Memory Aids

• Solar cell = light to electricity.
• Photovoltaic effect = emf by light.
• I_sc and V_oc define performance.

Digital Electronics and Logic Gates

Signals

• Analog signal: continuous time-varying signal.
• Digital signal: discrete levels (0 and 1).

OR gate

• Two or more inputs, one output.
• Output is high if any input is high.
• Boolean expression: Y = A + B.

Solved Examples

• Ex 1: OR gate output when A=0, B=1?
  Solution: Output Y=1.
• Ex 2: Boolean expression for OR gate?
  Solution: Y = A + B.

Practice Set

• Q1: OR gate output is high when:
  A. Both inputs low
  B. Any input high
  C. Both inputs high only
  D. No input high
• Q2: Boolean expression for OR gate is:
  A. Y = A · B
  B. Y = A + B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: OR gate output for A=0, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high if any input is high.
• Q2: B - Boolean expression is Y = A + B.
• Q3: A - Output is 0 when both inputs are 0.

Memory Aids

• OR gate: Output 1 if any input 1.
• Boolean: Y = A + B.

AND gate

AND gate basics

• Two or more inputs, one output.
• Output high only if all inputs are high.
• Boolean expression: Y = A · B.

Solved Examples

• Ex 1: AND gate output when A=1, B=0?
  Solution: Output Y=0.
• Ex 2: Boolean expression for AND gate?
  Solution: Y = A · B.

Practice Set

• Q1: AND gate output is high when:
  A. Any input high
  B. All inputs high
  C. No input high
  D. One input high
• Q2: Boolean expression for AND gate is:
  A. Y = A + B
  B. Y = A · B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: AND gate output for A=1, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only if all inputs are high.
• Q2: B - Boolean expression is Y = A · B.
• Q3: B - Output is 1 when both inputs are 1.

Memory Aids

• AND gate: Output 1 if all inputs 1.
• Boolean: Y = A · B.

NOT gate

NOT gate basics

• One input, one output.
• Output is inversion of input.
• Also called inverter.
• Boolean expression: Y = Ā.

Solved Examples

• Ex 1: NOT gate output when A=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOT gate?
  Solution: Y = Ā.

Practice Set

• Q1: NOT gate output for input 1 is:
  A. 1
  B. 0
  C. Undefined
  D. 2
• Q2: Boolean expression for NOT gate is:
  A. Y = A
  B. Y = Ā
  C. Y = A + B
  D. Y = A · B
• Q3: NOT gate has how many inputs?
  A. 1
  B. 2
  C. 3
  D. 0

Answer Key

• Q1: B - NOT gate inverts input 1 to output 0.
• Q2: B - Boolean expression is Y = Ā.
• Q3: A - NOT gate has only one input.

Memory Aids

• NOT gate = inverter.
• Output = opposite of input.

NAND gate

NAND gate basics

• AND gate followed by NOT gate.
• Output is negation of AND output.
• Boolean expression: Ā · B̄.

Solved Examples

• Ex 1: NAND gate output when A=1, B=1?
  Solution: Output Y=0.
• Ex 2: Boolean expression for NAND gate?
  Solution: Y = Ā · B̄.

Practice Set

• Q1: NAND gate output is low when:
  A. Both inputs low
  B. Both inputs high
  C. Any input low
  D. No input high
• Q2: Boolean expression for NAND gate is:
  A. Y = A + B
  B. Y = Ā · B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NAND gate output for A=0, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is low only when both inputs are high.
• Q2: B - Boolean expression is negation of AND: Ā · B̄.
• Q3: B - Output is 1 when any input is low.

Memory Aids

• NAND = AND + NOT.
• Output low only if all inputs high.

NOR gate

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = Ā + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = Ā + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = Ā + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: Ā + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = Ā + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = Ā + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = Ā + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: Ā + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

Overview

• Electronic circuits use devices controlling electron flow.
• Before transistors, vacuum tubes (diode, triode, tetrode, pentode) were used.
• Vacuum tubes are bulky, consume high power, operate at ~100 V, have limited life and low reliability.
• Modern solid-state semiconductors control charge carrier flow via junctions.
• Light, heat, or small voltage can change mobile charge carriers in semiconductors.
• CRT monitors replaced by LCD due to semiconductor development.

Classification of Metals, Conductors and Semiconductors

• Materials classified by electrical conductivity: Metals, Semiconductors, Insulators.
• Conductivity (σ) measures ease of electric current flow.
• Metals: High conductivity, electricity flows easily.
• Semiconductors: Medium conductivity, moderate current flow.
• Insulators: Very low conductivity, almost no current flow.
• Conductivity and resistivity (ρ) are inversely related.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 J = 2.49 eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = 1/2mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Energy Bands of Solids

Valence Band

• Contains valence electrons.
• Partially or fully filled.
• Electrons here do not conduct current.

Conduction Band

• Electrons rarely present or partially filled.
• Contains free electrons contributing to current.

Forbidden Energy Gap

• Energy gap between valence and conduction bands.
• No electrons present in this gap.
• Energy band gap formula: E_g = hν = hc/λ
• Where h = Planck's constant, c = speed of light, λ = wavelength.
• Band gap depends on temperature.

Fermi Energy

• Maximum energy of free electrons at 0 K.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 ; nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 ; J = 2.49 ; eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = (1/2)mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Valence Band

• Contains valence electrons.
• Partially or fully filled.
• Electrons here do not conduct current.

Conduction Band

• Electrons rarely present or partially filled.
• Contains free electrons contributing to current.

Forbidden Energy Gap

• Energy gap between valence and conduction bands.
• No electrons present in this gap.
• Energy band gap formula: E_g = hν = hc/λ
• Where h = Planck's constant, c = speed of light, λ = wavelength.
• Band gap depends on temperature.

Fermi Energy

• Maximum energy of free electrons at 0 K.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 ; nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 ; J = 2.49 ; eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = (1/2)mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Valence Band

• Contains valence electrons.
• Partially or fully filled.
• Electrons here do not conduct current.

Conduction Band

• Electrons rarely present or partially filled.
• Contains free electrons contributing to current.

Forbidden Energy Gap

• Energy gap between valence and conduction bands.
• No electrons present in this gap.
• Energy band gap formula: E_g = hν = hc/λ
• Where h = Planck's constant, c = speed of light, λ = wavelength.
• Band gap depends on temperature.

Fermi Energy

• Maximum energy of free electrons at 0 K.

Solved Examples

• Ex 1: Calculate band gap if λ = 500 ; nm.
  • E_g = (6.63 × 10^-34 × 3 × 10⁸)/(500 × 10^-9) = 3.98 × 10^-19 ; J = 2.49 ; eV

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. E_g = hν
  • B. E_g = mc²
  • C. E_g = (1/2)mv²
  • D. E_g = λc
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is E_g = hν.
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: E_g = hc/λ.
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Valence Band

• Contains valence electrons.
• Partially or fully filled.
• Electrons here do not conduct current.

Conduction Band

• Electrons rarely present or partially filled.
• Contains free electrons contributing to current.

Forbidden Energy Gap

• Energy gap between valence and conduction bands.
• No electrons present in this gap.
• Energy band gap formula: E_g = hν = hc/λ
• Where h = Planck's constant, c = speed of light, λ = wavelength.
• Band gap depends on temperature.

Fermi Energy

• Maximum energy of free electrons at 0 K.

Solved Examples

• Ex 1: Calculate band gap if \(\lambda = 500 \; \text{nm}\).
  • \(E_g = \frac{6.63 \times 10^{-34} \times 3 \times 10^8}{500 \times 10^{-9}} = 3.98 \times 10^{-19} \; \text{J} = 2.49 \; \text{eV}\)

Practice Set

• Q1: What is conduction band?
  • A. Filled with valence electrons
  • B. Empty or partially filled with free electrons
  • C. Energy gap
  • D. None
• Q2: Formula for energy band gap?
  • A. \(E_g = h \nu\)
  • B. \(E_g = mc^2\)
  • C. \(E_g = \frac{1}{2}mv^2\)
  • D. \(E_g = \lambda c\)
• Q3: Fermi energy is energy at?
  • A. Room temperature
  • B. Absolute zero
  • C. Melting point
  • D. Boiling point

Answer Key

• Q1: B - Conduction band has free electrons.
• Q2: A - Band gap formula is \(E_g = h \nu\).
• Q3: B - Fermi energy at 0 K.

Memory Aids

• Band gap energy: \(E_g = \frac{hc}{\lambda}\).
• Fermi energy max at 0 K.
• Conduction band = free electrons.

Energy Bands Classification

Metals

• Conduction band partially filled or overlaps valence band.
• No forbidden energy gap.

Insulators

• Valence band fully filled, conduction band empty.
• Wide forbidden gap > 5 eV.

Semiconductors

• Valence band full, conduction band empty.
• Small forbidden gap ~1 eV (Si: 1.1 eV, Ge: 0.72 eV).
• At 0 K, behave as insulators.

Solved Examples

• Ex 1: Identify material with overlapping bands.
  • Answer: Metal.
• Ex 2: Material with band gap 1.1 eV?
  • Answer: Silicon (semiconductor).

Practice Set

• Q1: Which has no band gap?
  • A. Metal
  • B. Semiconductor
  • C. Insulator
  • D. None
• Q2: Band gap of insulator is?
  • A. < 1 eV
  • B. ~1 eV
  • C. > 5 eV
  • D. 0 eV
• Q3: Band gap of germanium?
  • A. 0.72 eV
  • B. 1.1 eV
  • C. 5 eV
  • D. 0 eV

Answer Key

• Q1: A - Metals have overlapping bands, no gap.
• Q2: C - Insulators have band gap > 5 eV.
• Q3: A - Germanium band gap is 0.72 eV.

Memory Aids

• Metal: Overlapping bands, no gap.
• Insulator: Large gap > 5 eV.
• Semiconductor: Small gap ~1 eV.

Hole

Definition and Properties

• Positive charge carrier in semiconductors.
• Created when electron leaves covalent bond.
• Charge equal in magnitude to electron but positive.
• Mobility less than electron.

Solved Examples

• Ex 1: What charge does a hole carry?
  • Answer: Positive charge equal to electron charge.

Practice Set

• Q1: Hole is?
  • A. Negative charge carrier
  • B. Positive charge carrier
  • C. Neutral particle
  • D. Electron
• Q2: Hole mobility compared to electron is?
  • A. Greater
  • B. Equal
  • C. Smaller
  • D. Zero
• Q3: Hole is created when?
  • A. Electron breaks covalent bond
  • B. Electron recombines
  • C. Electron moves in conduction band
  • D. Electron is created

Answer Key

• Q1: B - Hole carries positive charge.
• Q2: C - Hole mobility is smaller than electron.
• Q3: A - Hole created when electron leaves covalent bond.

Memory Aids

• Hole = positive charge carrier.
• Mobility: electron > hole.
• Created by electron leaving bond.

Intrinsic Semiconductor

Definition and Examples

• Pure semiconductor without impurities is intrinsic semiconductor.
• Examples: Silicon (Si), Germanium (Ge).

Carrier Concentration

• Electron density in conduction band, n_e.
• Hole density in valence band, n_h.
• Intrinsic carrier concentration, n_i.
• In intrinsic semiconductor, n_e = n_h = n_i.

Current in Intrinsic Semiconductor

• Electrons and holes move in opposite directions under electric field.
• Total current, I = I_e + I_h, where I_e is electron current, I_h is hole current.
• Current formula: I = n_ieA(v_e + v_h), where A is cross-sectional area, v_e, v_h are drift velocities.

Conductivity and Resistivity

• Conductivity, σ = n_ie(μ_e + μ_h), where μ_e, μ_h are mobilities of electrons and holes.
• Resistivity, ρ = 1/σ = 1/(en_i(μ_e + μ_h)).

Temperature Effect

• Increasing temperature increases electron-hole pair density.
• Conductivity increases with temperature.
• Resistivity decreases with temperature.
• Semiconductors have negative temperature coefficient of resistance.

Crystal Structure and Hole Motion

• Si or Ge atoms form covalent bonds with 4 neighbors (+4 core charge).
• At low temperature, all bonds intact.
• Electron movement creates holes that appear to move through the lattice.

Solved Examples

• Ex 1: Calculate conductivity if n_i = 1 × 10¹⁶ m^-3, μ_e = 0.14 m²/V·s, μ_h = 0.05 m²/V·s, and e = 1.6 × 10^-19 C.
  • σ = n_ie(μ_e + μ_h) = 1 × 10¹⁶ × 1.6 × 10^-19 × (0.14 + 0.05) = 3.04 × 10^-3 S/m.
• Ex 2: Find resistivity ρ from above data.
  • ρ = 1/σ = 1 / 3.04 × 10^-3 = 329.0 Ω·m.

Practice Set

• Q1: What is the relation between electron and hole densities in intrinsic semiconductor?
  • A) n_e > n_h
  • B) n_e < n_h
  • C) n_e = n_h = n_i
  • D) None of these
• Q2: Conductivity σ of intrinsic semiconductor depends on?
  • A) Carrier concentration and mobility
  • B) Only carrier concentration
  • C) Only mobility
  • D) Temperature only
• Q3: If intrinsic carrier concentration doubles, what happens to conductivity?
  • A) Halves
  • B) Doubles
  • C) Quadruples
  • D) No change

Answer Key

• Q1: C - Electron and hole densities are equal in intrinsic semiconductor.
• Q2: A - Conductivity depends on carrier concentration and their mobilities.
• Q3: C - Conductivity σ = n_ie(μ_e + μ_h), doubling n_i doubles σ, so quadruples conductivity.

Memory Aids

• Intrinsic: Pure, no impurities.
• n_e = n_h = n_i always equal.
• Conductivity σ = n_ie(μ_e + μ_h).
• Resistivity inversely proportional to conductivity.
• Conductivity increases with temperature.

Definition and Examples

• Pure semiconductor without impurities is intrinsic semiconductor.
• Examples: Silicon (Si), Germanium (Ge).

Carrier Concentration

• Electron density in conduction band, n_e.
• Hole density in valence band, n_h.
• Intrinsic carrier concentration, n_i.
• In intrinsic semiconductor, n_e = n_h = n_i.

Current in Intrinsic Semiconductor

• Electrons and holes move in opposite directions under electric field.
• Total current, I = I_e + I_h, where I_e is electron current, I_h is hole current.
• Current formula: I = n_ieA(v_e + v_h), where A is cross-sectional area, v_e, v_h are drift velocities.

Conductivity and Resistivity

• Conductivity, σ = n_ie(μ_e + μ_h), where μ_e, μ_h are mobilities of electrons and holes.
• Resistivity, ρ = 1/σ = 1/(e n_i(μ_e + μ_h)).

Temperature Effect

• Increasing temperature increases electron-hole pair density.
• Conductivity increases with temperature.
• Resistivity decreases with temperature.
• Semiconductors have negative temperature coefficient of resistance.

Crystal Structure and Hole Motion

• Si or Ge atoms form covalent bonds with 4 neighbors (+4 core charge).
• At low temperature, all bonds intact.
• Electron movement creates holes that appear to move through the lattice.

Solved Examples

• Ex 1: Calculate conductivity if n_i = 1 × 10¹⁶ m^-3, μ_e = 0.14 m²/V·s, μ_h = 0.05 m²/V·s, and e = 1.6 × 10^-19 C.
  • σ = n_ie(μ_e + μ_h) = 1 × 10¹⁶ × 1.6 × 10^-19 × (0.14 + 0.05) = 3.04 × 10^-3 S/m.
• Ex 2: Find resistivity ρ from above data.
  • ρ = 1/σ = 1 / 3.04 × 10^-3 = 329.0 Ω·m.

Practice Set

• Q1: What is the relation between electron and hole densities in intrinsic semiconductor?
  • A) n_e > n_h
  • B) n_e < n_h
  • C) n_e = n_h = n_i
  • D) None of these
• Q2: Conductivity σ of intrinsic semiconductor depends on?
  • A) Carrier concentration and mobility
  • B) Only carrier concentration
  • C) Only mobility
  • D) Temperature only
• Q3: If intrinsic carrier concentration doubles, what happens to conductivity?
  • A) Halves
  • B) Doubles
  • C) Quadruples
  • D) No change

Answer Key

• Q1: C - Electron and hole densities are equal in intrinsic semiconductor.
• Q2: A - Conductivity depends on carrier concentration and their mobilities.
• Q3: C - Conductivity σ = n_ie(μ_e + μ_h), doubling n_i doubles σ, so quadruples conductivity.

Memory Aids

• Intrinsic: Pure, no impurities.
• n_e = n_h = n_i always equal.
• Conductivity σ = n_ie(μ_e + μ_h).
• Resistivity inversely proportional to conductivity.
• Conductivity increases with temperature.

Definition and Examples

• Pure semiconductor without impurities is intrinsic semiconductor.
• Examples: Silicon (Si), Germanium (Ge).

Carrier Concentration

• Electron density in conduction band, n_e.
• Hole density in valence band, n_h.
• Intrinsic carrier concentration, n_i.
• In intrinsic semiconductor, n_e = n_h = n_i.

Current in Intrinsic Semiconductor

• Electrons and holes move in opposite directions under electric field.
• Total current, I = I_e + I_h, where I_e is electron current, I_h is hole current.
• Current formula: I = n_ieA(v_e + v_h), where A is cross-sectional area, v_e, v_h are drift velocities.

Conductivity and Resistivity

• Conductivity, σ = n_ie(μ_e + μ_h), where μ_e, μ_h are mobilities of electrons and holes.
• Resistivity, ρ = 1/σ = 1/(en_i(μ_e + μ_h)).

Temperature Effect

• Increasing temperature increases electron-hole pair density.
• Conductivity increases with temperature.
• Resistivity decreases with temperature.
• Semiconductors have negative temperature coefficient of resistance.

Crystal Structure and Hole Motion

• Si or Ge atoms form covalent bonds with 4 neighbors (+4 core charge).
• At low temperature, all bonds intact.
• Electron movement creates holes that appear to move through the lattice.

Solved Examples

• Ex 1: Calculate conductivity if n_i = 1 × 10¹⁶ m^-3, μ_e = 0.14 m²/V·s, μ_h = 0.05 m²/V·s, and e = 1.6 × 10^-19 C.
  • σ = n_ie(μ_e + μ_h) = 1 × 10¹⁶ × 1.6 × 10^-19 × (0.14 + 0.05) = 3.04 × 10^-3 S/m.
• Ex 2: Find resistivity ρ from above data.
  • ρ = 1/σ = 1 / 3.04 × 10^-3 = 329.0 Ω·m.

Practice Set

• Q1: What is the relation between electron and hole densities in intrinsic semiconductor?
  • A) n_e > n_h
  • B) n_e < n_h
  • C) n_e = n_h = n_i
  • D) None of these
• Q2: Conductivity σ of intrinsic semiconductor depends on?
  • A) Carrier concentration and mobility
  • B) Only carrier concentration
  • C) Only mobility
  • D) Temperature only
• Q3: If intrinsic carrier concentration doubles, what happens to conductivity?
  • A) Halves
  • B) Doubles
  • C) Quadruples
  • D) No change

Answer Key

• Q1: C - Electron and hole densities are equal in intrinsic semiconductor.
• Q2: A - Conductivity depends on carrier concentration and their mobilities.
• Q3: C - Conductivity σ = n_ie(μ_e + μ_h), doubling n_i doubles σ, so quadruples conductivity.

Memory Aids

• Intrinsic: Pure, no impurities.
• n_e = n_h = n_i always equal.
• Conductivity σ = n_ie(μ_e + μ_h).
• Resistivity inversely proportional to conductivity.
• Conductivity increases with temperature.

Definition and Examples

• Pure semiconductor without impurities is intrinsic semiconductor.
• Examples: Silicon (Si), Germanium (Ge).

Carrier Concentration

• Electron density in conduction band, \( n_e \).
• Hole density in valence band, \( n_h \).
• Intrinsic carrier concentration, \( n_i \).
• In intrinsic semiconductor, \( n_e = n_h = n_i \).

Current in Intrinsic Semiconductor

• Electrons and holes move in opposite directions under electric field.
• Total current, \( I = I_e + I_h \), where \( I_e \) is electron current, \( I_h \) is hole current.
• Current formula: \( I = n_i e A (v_e + v_h) \), where \( A \) is cross-sectional area, \( v_e, v_h \) are drift velocities.

Conductivity and Resistivity

• Conductivity, \( \sigma = n_i e (\mu_e + \mu_h) \), where \( \mu_e, \mu_h \) are mobilities of electrons and holes.
• Resistivity, \( \rho = \frac{1}{\sigma} = \frac{1}{e n_i (\mu_e + \mu_h)} \).

Temperature Effect

• Increasing temperature increases electron-hole pair density.
• Conductivity increases with temperature.
• Resistivity decreases with temperature.
• Semiconductors have negative temperature coefficient of resistance.

Crystal Structure and Hole Motion

• Si or Ge atoms form covalent bonds with 4 neighbors (+4 core charge).
• At low temperature, all bonds intact.
• Electron movement creates holes that appear to move through the lattice.

Solved Examples

• Ex 1: Calculate conductivity if \( n_i = 1 \times 10^{16} \) m\(^{-3}\), \( \mu_e = 0.14 \) m\(^2\)/V·s, \( \mu_h = 0.05 \) m\(^2\)/V·s, and \( e = 1.6 \times 10^{-19} \) C.
  • \( \sigma = n_i e (\mu_e + \mu_h) = 1 \times 10^{16} \times 1.6 \times 10^{-19} \times (0.14 + 0.05) = 3.04 \times 10^{-3} \) S/m.
• Ex 2: Find resistivity \( \rho \) from above data.
  • \( \rho = 1/\sigma = 1 / 3.04 \times 10^{-3} = 329.0 \) \( \Omega \)·m.

Practice Set

• Q1: What is the relation between electron and hole densities in intrinsic semiconductor?
  • A) \( n_e > n_h \)
  • B) \( n_e < n_h \)
  • C) \( n_e = n_h = n_i \)
  • D) None of these
• Q2: Conductivity \( \sigma \) of intrinsic semiconductor depends on?
  • A) Carrier concentration and mobility
  • B) Only carrier concentration
  • C) Only mobility
  • D) Temperature only
• Q3: If intrinsic carrier concentration doubles, what happens to conductivity?
  • A) Halves
  • B) Doubles
  • C) Quadruples
  • D) No change

Answer Key

• Q1: C - Electron and hole densities are equal in intrinsic semiconductor.
• Q2: A - Conductivity depends on carrier concentration and their mobilities.
• Q3: C - Conductivity \( \sigma = n_i e (\mu_e + \mu_h) \), doubling \( n_i \) doubles \( \sigma \), so quadruples conductivity.

Memory Aids

• Intrinsic: Pure, no impurities.
• \( n_e = n_h = n_i \) always equal.
• Conductivity \( \sigma = n_i e (\mu_e + \mu_h) \).
• Resistivity inversely proportional to conductivity.
• Conductivity increases with temperature.

Energy Band Diagram

Band Structure at Different Temperatures

• At T=0 K, valence band (VB) full, conduction band (CB) empty.
• Intrinsic semiconductor behaves like insulator at 0 K.
• At T>0 K, electrons gain thermal energy, jump from VB to CB.
• Equal number of holes created in VB.
• Electrons occupy lowest energy levels in CB.
• Number of electrons in CB equals number of holes in VB.

Solved Examples

• Ex 1: At 0 K, what is the conductivity of intrinsic semiconductor?
  • Zero, as no free electrons in conduction band.
• Ex 2: Why does conductivity increase with temperature?
  • Thermal energy excites electrons to conduction band, increasing free carriers.

Practice Set

• Q1: At 0 K, intrinsic semiconductor behaves as?
  • A) Conductor
  • B) Insulator
  • C) Semiconductor
  • D) Superconductor
• Q2: What causes holes in valence band?
  • A) Electron excitation to conduction band
  • B) Electron recombination
  • C) Impurity doping
  • D) None of these
• Q3: Number of electrons in conduction band equals?
  • A) Number of holes in valence band
  • B) Number of atoms
  • C) Number of impurities
  • D) Zero

Answer Key

• Q1: B - At 0 K, no free electrons, acts as insulator.
• Q2: A - Holes created by electron excitation to conduction band.
• Q3: A - Electrons in CB equal holes in VB.

Memory Aids

• At 0 K, no conduction.
• Thermal energy creates electron-hole pairs.
• Electron-hole pairs enable conductivity.

Band Structure at Different Temperatures

• At \( T=0 \) K, valence band (VB) full, conduction band (CB) empty.
• Intrinsic semiconductor behaves like insulator at 0 K.
• At \( T>0 \) K, electrons gain thermal energy, jump from VB to CB.
• Equal number of holes created in VB.
• Electrons occupy lowest energy levels in CB.
• Number of electrons in CB equals number of holes in VB.

Solved Examples

• Ex 1: At 0 K, what is the conductivity of intrinsic semiconductor?
  • Zero, as no free electrons in conduction band.
• Ex 2: Why does conductivity increase with temperature?
  • Thermal energy excites electrons to conduction band, increasing free carriers.

Practice Set

• Q1: At 0 K, intrinsic semiconductor behaves as?
  • A) Conductor
  • B) Insulator
  • C) Semiconductor
  • D) Superconductor
• Q2: What causes holes in valence band?
  • A) Electron excitation to conduction band
  • B) Electron recombination
  • C) Impurity doping
  • D) None of these
• Q3: Number of electrons in conduction band equals?
  • A) Number of holes in valence band
  • B) Number of atoms
  • C) Number of impurities
  • D) Zero

Answer Key

• Q1: B - At 0 K, no free electrons, acts as insulator.
• Q2: A - Holes created by electron excitation to conduction band.
• Q3: A - Electrons in CB equal holes in VB.

Memory Aids

• At 0 K, no conduction.
• Thermal energy creates electron-hole pairs.
• Electron-hole pairs enable conductivity.

Extrinsic Semiconductor

Concepts

• Impure semiconductor with added impurities is called extrinsic semiconductor.
• Doping: Adding small amounts of impurities with different valency to pure semiconductor.
• Impurities increase mobile electrons or holes, enhancing conductivity.
• Two types: n-type (pentavalent impurities) and p-type (trivalent impurities).
• Energy bands affected by donor (n-type) or acceptor (p-type) levels.

Solved Examples

• Ex 1: Calculate the effect of doping on conductivity if donor atoms increase free electrons by 10¹⁵ cm^-3.
• Step 1: Identify donor density N_d = 10¹⁵ cm^-3.
• Step 2: Free electron concentration n_e ≈ N_d = 10¹⁵ cm^-3.
• Step 3: Conductivity increases proportionally to n_e.

Practice Set

• Q1: What is doping in semiconductors?
  • A. Removing impurities
  • B. Adding impurities to increase conductivity
  • C. Heating semiconductor
  • D. Cooling semiconductor
• Q2: Which impurity type is used for n-type semiconductor?
  • A. Trivalent
  • B. Pentavalent
  • C. Tetravalent
  • D. Hexavalent
• Q3: In extrinsic semiconductors, what mainly increases conductivity?
  • A. Holes in n-type
  • B. Electrons in p-type
  • C. Electrons in n-type
  • D. Holes in intrinsic

Answer Key

• Q1: B - Doping means adding impurities to increase conductivity.
• Q2: B - Pentavalent impurities create n-type semiconductors.
• Q3: C - Electrons are majority carriers in n-type, increasing conductivity.

Memory Aids

• Doping = Adding impurities to increase charge carriers.
• n-type = Negative charge carriers (electrons) from pentavalent donors.
• p-type = Positive charge carriers (holes) from trivalent acceptors.

n-type Semiconductor

Concepts

• Pure Si or Ge (tetravalent) doped with group V pentavalent impurities (As, Sb, P).
• Donor atoms donate one free electron for conduction.
• Conduction due to electrons (negative charge carriers).
• Majority carriers: electrons; minority carriers: holes.
• Charge neutrality maintained.
• Electron concentration: n_e ≈ N_d ≫ n_h, where N_d = donor density.

Solved Examples

• Ex 1: Find majority carrier concentration if donor density N_d = 5 × 10¹⁶ cm^-3.
• Step 1: Majority carrier concentration n_e ≈ N_d = 5 × 10¹⁶ cm^-3.
• Step 2: Minority carrier concentration n_h is negligible.

Practice Set

• Q1: What type of impurity is used in n-type semiconductor?
  • A. Trivalent
  • B. Pentavalent
  • C. Tetravalent
  • D. Divalent
• Q2: Majority carriers in n-type semiconductor are?
  • A. Holes
  • B. Electrons
  • C. Ions
  • D. Neutrons
• Q3: If donor density N_d = 10¹⁵ cm^-3, what is electron concentration?
  • A. 10¹⁴ cm^-3
  • B. 10¹⁵ cm^-3
  • C. 10¹⁶ cm^-3
  • D. 10¹³ cm^-3

Answer Key

• Q1: B - Pentavalent impurities are used in n-type doping.
• Q2: B - Electrons are majority carriers in n-type semiconductor.
• Q3: B - Electron concentration equals donor density N_d.

Memory Aids

• n-type = Negative charge carriers (electrons).
• Donor atoms = Pentavalent impurities.
• Electron concentration n_e ≈ N_d.

Concepts

• Pure Si or Ge (tetravalent) doped with group V pentavalent impurities (As, Sb, P).
• Donor atoms donate one free electron for conduction.
• Conduction due to electrons (negative charge carriers).
• Majority carriers: electrons; minority carriers: holes.
• Charge neutrality maintained.
• Electron concentration: \( n_e \approx N_d \gg n_h \), where \( N_d \) = donor density.

Solved Examples

• Ex 1: Find majority carrier concentration if donor density \( N_d = 5 \times 10^{16} \) cm^-3.
• Step 1: Majority carrier concentration \( n_e \approx N_d = 5 \times 10^{16} \) cm^-3.
• Step 2: Minority carrier concentration \( n_h \) is negligible.

Practice Set

• Q1: What type of impurity is used in n-type semiconductor?
  • A. Trivalent
  • B. Pentavalent
  • C. Tetravalent
  • D. Divalent
• Q2: Majority carriers in n-type semiconductor are?
  • A. Holes
  • B. Electrons
  • C. Ions
  • D. Neutrons
• Q3: If donor density \( N_d = 10^{15} \) cm^-3, what is electron concentration?
  • A. \( 10^{14} \) cm^-3
  • B. \( 10^{15} \) cm^-3
  • C. \( 10^{16} \) cm^-3
  • D. \( 10^{13} \) cm^-3

Answer Key

• Q1: B - Pentavalent impurities are used in n-type doping.
• Q2: B - Electrons are majority carriers in n-type semiconductor.
• Q3: B - Electron concentration equals donor density \( N_d \).

Memory Aids

• n-type = Negative charge carriers (electrons).
• Donor atoms = Pentavalent impurities.
• Electron concentration \( n_e \approx N_d \).

p-type Semiconductor

Concepts

• Pure Si or Ge doped with group III trivalent impurities (Al, B, In).
• Acceptor atoms create holes (positive charge carriers).
• Conduction due to holes.
• Majority carriers: holes; minority carriers: electrons.
• Charge neutrality maintained.
• Hole concentration: n_h ≈ N_a ≫ n_e, where N_a = acceptor density.

Solved Examples

• Ex 1: Calculate hole concentration if acceptor density N_a = 2 × 10¹⁶ cm^-3.
• Step 1: Hole concentration n_h ≈ N_a = 2 × 10¹⁶ cm^-3.
• Step 2: Electron concentration n_e is negligible.

Practice Set

• Q1: What type of impurity is used in p-type semiconductor?
  • A. Pentavalent
  • B. Trivalent
  • C. Tetravalent
  • D. Hexavalent
• Q2: Majority carriers in p-type semiconductor are?
  • A. Electrons
  • B. Holes
  • C. Ions
  • D. Neutrons
• Q3: If acceptor density N_a = 10¹⁵ cm^-3, what is hole concentration?
  • A. 10¹⁴ cm^-3
  • B. 10¹⁵ cm^-3
  • C. 10¹⁶ cm^-3
  • D. 10¹³ cm^-3

Answer Key

• Q1: B - Trivalent impurities are used in p-type doping.
• Q2: B - Holes are majority carriers in p-type semiconductor.
• Q3: B - Hole concentration equals acceptor density N_a.

Memory Aids

• p-type = Positive charge carriers (holes).
• Acceptor atoms = Trivalent impurities.
• Hole concentration n_h ≈ N_a.

Concepts

• Pure Si or Ge doped with group III trivalent impurities (Al, B, In).
• Acceptor atoms create holes (positive charge carriers).
• Conduction due to holes.
• Majority carriers: holes; minority carriers: electrons.
• Charge neutrality maintained.
• Hole concentration: \( n_h \approx N_a \gg n_e \), where \( N_a \) = acceptor density.

Solved Examples

• Ex 1: Calculate hole concentration if acceptor density \( N_a = 2 \times 10^{16} \) cm^-3.
• Step 1: Hole concentration \( n_h \approx N_a = 2 \times 10^{16} \) cm^-3.
• Step 2: Electron concentration \( n_e \) is negligible.

Practice Set

• Q1: What type of impurity is used in p-type semiconductor?
  • A. Pentavalent
  • B. Trivalent
  • C. Tetravalent
  • D. Hexavalent
• Q2: Majority carriers in p-type semiconductor are?
  • A. Electrons
  • B. Holes
  • C. Ions
  • D. Neutrons
• Q3: If acceptor density \( N_a = 10^{15} \) cm^-3, what is hole concentration?
  • A. \( 10^{14} \) cm^-3
  • B. \( 10^{15} \) cm^-3
  • C. \( 10^{16} \) cm^-3
  • D. \( 10^{13} \) cm^-3

Answer Key

• Q1: B - Trivalent impurities are used in p-type doping.
• Q2: B - Holes are majority carriers in p-type semiconductor.
• Q3: B - Hole concentration equals acceptor density \( N_a \).

Memory Aids

• p-type = Positive charge carriers (holes).
• Acceptor atoms = Trivalent impurities.
• Hole concentration \( n_h \approx N_a \).

p-n Junction

Formation and Charge Distribution

• Free electrons from n-type diffuse to p-type, filling holes.
• Positive charge layer forms on n-side; negative charge layer on p-side.
• Charge layers form quickly, stopping further carrier movement.
• Potential difference (V₀) of 0.1–0.3 V (Ge: 0.3 V, Si: 0.7 V) forms as a barrier.
• Depletion layer: thin region with immobile charges around junction.

Currents in p-n Junction

• Diffusion current: Holes diffuse p → n; electrons diffuse n → p due to concentration difference.
• Drift current: Minority carriers move across barrier due to potential, creating drift current.

Electric Field

• Electric field intensity, E = V/d, where V is potential barrier and d is depletion width.

Solved Examples

• Ex 1: Calculate electric field if V₀ = 0.7 V and d = 2 × 10^-6 m.
  • Use E = V/d = 0.7/(2 × 10^-6) = 3.5 × 10⁵ V/m.

Practice Set

• Q1: What is the typical potential barrier for silicon p-n junction?
  • A) 0.1 V
  • B) 0.3 V
  • C) 0.7 V
  • D) 1.0 V
• Q2: Which current is due to minority carriers moving across the junction?
  • A) Diffusion current
  • B) Drift current
  • C) Both currents
  • D) None
• Q3: If the depletion width is 1 × 10^-6 m and barrier potential is 0.3 V, what is the electric field intensity?
  • A) 3 × 10⁵ V/m
  • B) 3 × 10⁴ V/m
  • C) 3 × 10⁶ V/m
  • D) 3 × 10³ V/m

Answer Key

• Q1: C - Silicon p-n junction barrier is typically 0.7 V.
• Q2: B - Drift current is due to minority carriers moving across the barrier.
• Q3: A - E = V/d = 0.3 / 1 × 10^-6 = 3 × 10⁵ V/m.

Memory Aids

• Potential barrier: Ge ~0.3 V, Si ~0.7 V.
• Diffusion current: majority carriers move due to concentration gradient.
• Drift current: minority carriers move due to electric field.
• Electric field: E = V/d.

Formation and Charge Distribution

• Free electrons from n-type diffuse to p-type, filling holes.
• Positive charge layer forms on n-side; negative charge layer on p-side.
• Charge layers form quickly, stopping further carrier movement.
• Potential difference (V₀) of 0.1–0.3 V (Ge: 0.3 V, Si: 0.7 V) forms as a barrier.
• Depletion layer: thin region with immobile charges around junction.

Currents in p-n Junction

• Diffusion current: Holes diffuse p → n; electrons diffuse n → p due to concentration difference.
• Drift current: Minority carriers move across barrier due to potential, creating drift current.

Electric Field

• Electric field intensity, \( E = \frac{V}{d} \), where \( V \) is potential barrier and \( d \) is depletion width.

Solved Examples

• Ex 1: Calculate electric field if \( V_0 = 0.7 \text{ V} \) and \( d = 2 \times 10^{-6} \text{ m} \).
  • Use \( E = \frac{V}{d} = \frac{0.7}{2 \times 10^{-6}} = 3.5 \times 10^{5} \text{ V/m} \).

Practice Set

• Q1: What is the typical potential barrier for silicon p-n junction?
  • A) 0.1 V
  • B) 0.3 V
  • C) 0.7 V
  • D) 1.0 V
• Q2: Which current is due to minority carriers moving across the junction?
  • A) Diffusion current
  • B) Drift current
  • C) Both currents
  • D) None
• Q3: If the depletion width is \( 1 \times 10^{-6} \text{ m} \) and barrier potential is 0.3 V, what is the electric field intensity?
  • A) \( 3 \times 10^{5} \text{ V/m} \)
  • B) \( 3 \times 10^{4} \text{ V/m} \)
  • C) \( 3 \times 10^{6} \text{ V/m} \)
  • D) \( 3 \times 10^{3} \text{ V/m} \)

Answer Key

• Q1: C - Silicon p-n junction barrier is typically 0.7 V.
• Q2: B - Drift current is due to minority carriers moving across the barrier.
• Q3: A - \( E = V/d = 0.3 / 1 \times 10^{-6} = 3 \times 10^{5} \text{ V/m} \).

Memory Aids

• Potential barrier: Ge ~0.3 V, Si ~0.7 V.
• Diffusion current: majority carriers move due to concentration gradient.
• Drift current: minority carriers move due to electric field.
• Electric field: \( E = V/d \).

Semiconductor Diode

Basic Concept

• A semiconductor diode is a p-n junction with metallic contacts for external voltage application.
• Current flows mainly from p-side to n-side under forward bias (arrow direction shows conventional current).
• Equilibrium barrier potential changes with applied external voltage V.

Structure and Symbol

• Formed by joining p-type and n-type semiconductors.
• Depletion region at junction acts as a barrier to current.
• Metallic contacts connect diode to circuit.
• Symbol shows arrow indicating forward current direction.

Solved Examples

Ex 1

• Identify the direction of current flow in a given diode symbol: Current flows from p to n side (arrow direction).
• Apply external voltage to alter barrier potential and observe current change.

Practice Set

• Q1: What does the arrow in a diode symbol indicate?
  • A) Electron flow direction
  • B) Conventional current direction
  • C) Voltage polarity
  • D) Depletion region width
• Q2: What forms the depletion region in a semiconductor diode?
  • A) Metallic contacts
  • B) Junction of p and n regions
  • C) External voltage
  • D) Battery connection
• Q3: Applying forward bias to a diode does what to the barrier potential?
  • A) Increases it
  • B) Decreases it
  • C) No change
  • D) Removes it completely

Answer Key

• Q1: B - Arrow shows conventional current flow direction under forward bias.
• Q2: B - Depletion region forms at the p-n junction.
• Q3: B - Forward bias reduces the barrier potential allowing current flow.

Memory Aids

• Arrow in diode symbol = conventional current direction.
• Depletion region = barrier to current at p-n junction.
• Forward bias lowers barrier potential, enabling conduction.

Basic Concept

• A semiconductor diode is a p-n junction with metallic contacts for external voltage application.
• Current flows mainly from p-side to n-side under forward bias (arrow direction shows conventional current).
• Equilibrium barrier potential changes with applied external voltage \( V \).

Structure and Symbol

• Formed by joining p-type and n-type semiconductors.
• Depletion region at junction acts as a barrier to current.
• Metallic contacts connect diode to circuit.
• Symbol shows arrow indicating forward current direction.

Solved Examples

Ex 1

• Identify the direction of current flow in a given diode symbol: Current flows from p to n side (arrow direction).
• Apply external voltage to alter barrier potential and observe current change.

Practice Set

• Q1: What does the arrow in a diode symbol indicate?
  • A) Electron flow direction
  • B) Conventional current direction
  • C) Voltage polarity
  • D) Depletion region width
• Q2: What forms the depletion region in a semiconductor diode?
  • A) Metallic contacts
  • B) Junction of p and n regions
  • C) External voltage
  • D) Battery connection
• Q3: Applying forward bias to a diode does what to the barrier potential?
  • A) Increases it
  • B) Decreases it
  • C) No change
  • D) Removes it completely

Answer Key

• Q1: B - Arrow shows conventional current flow direction under forward bias.
• Q2: B - Depletion region forms at the p-n junction.
• Q3: B - Forward bias reduces the barrier potential allowing current flow.

Memory Aids

• Arrow in diode symbol = conventional current direction.
• Depletion region = barrier to current at p-n junction.
• Forward bias lowers barrier potential, enabling conduction.

Biasing of p-n Junction

Unbiased Junction

• No external voltage applied.
• Built-in electric field exists due to voltage rise from p to n side.
• Diffusion current i_df and drift current i_dr balance each other.
• Net current i_net = 0.

Forward Bias

• Positive terminal connected to p-side, negative to n-side.
• Barrier potential decreases, depletion width narrows.
• Low resistance at junction, high current flows.
• Net current i_net flows forward.

Reverse Bias

• Positive terminal connected to n-side, negative to p-side.
• Barrier potential increases, depletion width widens.
• High resistance at junction, very low current (leakage current) flows.
• Net current i_net ≈ 0, blocks current flow.

Solved Examples

Ex 1

• Determine the effect of forward bias on depletion width: It decreases.
• Determine the effect of reverse bias on barrier potential: It increases.

Practice Set

• Q1: What happens to the depletion width under forward bias?
  • A) Increases
  • B) Decreases
  • C) No change
  • D) Becomes zero
• Q2: Under reverse bias, the current through the diode is:
  • A) High
  • B) Zero
  • C) Very low (leakage)
  • D) Same as forward bias
• Q3: In reverse bias, the barrier potential:
  • A) Decreases
  • B) Increases
  • C) Remains constant
  • D) Is zero

Answer Key

• Q1: B - Forward bias narrows the depletion region.
• Q2: C - Reverse bias allows only a tiny leakage current.
• Q3: B - Barrier potential increases under reverse bias.

Memory Aids

• Forward bias = barrier down, depletion narrows, current flows.
• Reverse bias = barrier up, depletion widens, current blocked.
• Net current zero when unbiased.

Unbiased Junction

• No external voltage applied.
• Built-in electric field exists due to voltage rise from p to n side.
• Diffusion current \( i_{df} \) and drift current \( i_{dr} \) balance each other.
• Net current \( i_{net} = 0 \).

Forward Bias

• Positive terminal connected to p-side, negative to n-side.
• Barrier potential decreases, depletion width narrows.
• Low resistance at junction, high current flows.
• Net current \( i_{net} \) flows forward.

Reverse Bias

• Positive terminal connected to n-side, negative to p-side.
• Barrier potential increases, depletion width widens.
• High resistance at junction, very low current (leakage current) flows.
• Net current \( i_{net} \approx 0 \), blocks current flow.

Solved Examples

Ex 1

• Determine the effect of forward bias on depletion width: It decreases.
• Determine the effect of reverse bias on barrier potential: It increases.

Practice Set

• Q1: What happens to the depletion width under forward bias?
  • A) Increases
  • B) Decreases
  • C) No change
  • D) Becomes zero
• Q2: Under reverse bias, the current through the diode is:
  • A) High
  • B) Zero
  • C) Very low (leakage)
  • D) Same as forward bias
• Q3: In reverse bias, the barrier potential:
  • A) Decreases
  • B) Increases
  • C) Remains constant
  • D) Is zero

Answer Key

• Q1: B - Forward bias narrows the depletion region.
• Q2: C - Reverse bias allows only a tiny leakage current.
• Q3: B - Barrier potential increases under reverse bias.

Memory Aids

• Forward bias = barrier down, depletion narrows, current flows.
• Reverse bias = barrier up, depletion widens, current blocked.
• Net current zero when unbiased.

I-V Characteristic of Diode

Measurement Setup

• Diode connected with battery, voltmeter, and current meter (milliammeter or microammeter).
• Switch controls circuit ON/OFF.
• Milliammeter measures higher currents; microammeter measures very low currents.

Current Equation

• Current through diode: I = I₀ [e^eV/nkT - 1]
• Where n = 1 for Ge, n = 2 for Si.
• I₀ is the reverse saturation current.
• Dynamic resistance: r_d = ΔV/ΔI
• Static (dc) resistance: r_dc = V/I

Zener Diode Characteristics

• Forward bias: Current rises rapidly after knee voltage.
• Reverse bias: Small leakage current until breakdown voltage V_Z.
• At V_Z, current increases sharply (Zener effect) without damage.
• Used for voltage regulation.

Solved Examples

Ex 1

• Calculate current for given V using I = I₀ [e^eV/nkT - 1].
• Determine dynamic resistance from ΔV and ΔI values.

Practice Set

• Q1: In the diode current equation, n equals:
  • A) 1 for Si, 2 for Ge
  • B) 2 for Si, 1 for Ge
  • C) 1 for both
  • D) 2 for both
• Q2: Dynamic resistance r_d is defined as:
  • A) V/I
  • B) ΔV / ΔI
  • C) I/V
  • D) V × I
• Q3: At Zener breakdown voltage, the diode:
  • A) Blocks current
  • B) Allows large reverse current without damage
  • C) Behaves like a resistor
  • D) Stops conducting

Answer Key

• Q1: B - n=2 for Si, n=1 for Ge.
• Q2: B - Dynamic resistance is ΔV / ΔI.
• Q3: B - Zener diode allows large reverse current at breakdown voltage.

Memory Aids

• Current formula: exponential growth with voltage.
• Dynamic resistance = slope of I-V curve.
• Zener diode stabilizes voltage at breakdown point.

Measurement Setup

• Diode connected with battery, voltmeter, and current meter (milliammeter or microammeter).
• Switch controls circuit ON/OFF.
• Milliammeter measures higher currents; microammeter measures very low currents.

Current Equation

• Current through diode: \( I = I_0 \left[ e^{\frac{eV}{nkT}} - 1 \right] \)
• Where \( n = 1 \) for Ge, \( n = 2 \) for Si.
• \( I_0 \) is the reverse saturation current.
• Dynamic resistance: \( r_d = \frac{\Delta V}{\Delta I} \)
• Static (dc) resistance: \( r_{dc} = \frac{V}{I} \)

Zener Diode Characteristics

• Forward bias: Current rises rapidly after knee voltage.
• Reverse bias: Small leakage current until breakdown voltage \( V_Z \).
• At \( V_Z \), current increases sharply (Zener effect) without damage.
• Used for voltage regulation.

Solved Examples

Ex 1

• Calculate current for given \( V \) using \( I = I_0 [e^{eV/nkT} - 1] \).
• Determine dynamic resistance from \( \Delta V \) and \( \Delta I \) values.

Practice Set

• Q1: In the diode current equation, \( n \) equals:
  • A) 1 for Si, 2 for Ge
  • B) 2 for Si, 1 for Ge
  • C) 1 for both
  • D) 2 for both
• Q2: Dynamic resistance \( r_d \) is defined as:
  • A) \( V/I \)
  • B) \( \Delta V / \Delta I \)
  • C) \( I/V \)
  • D) \( V \times I \)
• Q3: At Zener breakdown voltage, the diode:
  • A) Blocks current
  • B) Allows large reverse current without damage
  • C) Behaves like a resistor
  • D) Stops conducting

Answer Key

• Q1: B - \( n=2 \) for Si, \( n=1 \) for Ge.
• Q2: B - Dynamic resistance is \( \Delta V / \Delta I \).
• Q3: B - Zener diode allows large reverse current at breakdown voltage.

Memory Aids

• Current formula: exponential growth with voltage.
• Dynamic resistance = slope of I-V curve.
• Zener diode stabilizes voltage at breakdown point.

Application of Junction Diode as a Rectifier

Rectifier

• Converts AC voltage to DC voltage.
• Uses diode based on forward bias conduction and reverse bias non-conduction.

Half wave rectifier

• Diode conducts during positive half cycle only.
• Output is unidirectional pulsating DC.
• Output frequency = input frequency.

Full wave rectifier

• Rectifies both positive and negative halves of AC input.
• Uses two diodes and transformer with center tap.
• Output frequency = 2 × input frequency.
• Output is smoother pulsating DC than half wave.

Solved Examples

• Ex 1: Calculate output frequency of full wave rectifier if input frequency is 50 Hz.
  Solution: Output frequency = 2 × 50 = 100 Hz.
• Ex 2: What is the output frequency of half wave rectifier for 60 Hz input?
  Solution: Output frequency = 60 Hz.

Practice Set

• Q1: What does a rectifier do?
  A. Converts DC to AC
  B. Converts AC to DC
  C. Amplifies AC
  D. Blocks AC
  
• Q2: In half wave rectification, diode conducts during:
  A. Negative half cycle
  B. Positive half cycle
  C. Both half cycles
  D. None
• Q3: Output frequency of full wave rectifier for 50 Hz input is:
  A. 25 Hz
  B. 50 Hz
  C. 100 Hz
  D. 200 Hz

Answer Key

• Q1: B - Rectifier converts AC voltage to DC voltage.
• Q2: B - Diode conducts only during positive half cycle in half wave rectifier.
• Q3: C - Full wave rectifier output frequency is twice the input frequency.

Memory Aids

• Half wave: Conducts half cycle, output freq = input freq.
• Full wave: Conducts both halves, output freq = 2 × input freq.
• Rectifier = AC to DC converter.

Special Purpose p-n Junction Diodes

Zener diode

• Heavily doped p-n junction diode.
• Operates in reverse bias.
• Zener voltage remains constant over wide current range.
• Used as voltage regulator.

Zener diode as voltage regulator

• Voltage across Zener diode remains constant despite input voltage changes.
• Voltage drop across series resistor changes to maintain constant voltage.

Solved Examples

• Ex 1: If input voltage increases, what happens to voltage across Zener diode?
  Solution: Voltage across Zener diode remains constant.
• Ex 2: What is the role of series resistor in Zener voltage regulator?
  Solution: It drops excess voltage to maintain constant Zener voltage.

Practice Set

• Q1: Zener diode operates in:
  A. Forward bias
  B. Reverse bias
  C. Both
  D. None
• Q2: Zener voltage is:
  A. Variable with current
  B. Constant over wide current range
  C. Zero
  D. Negative
• Q3: In Zener voltage regulator, if input voltage increases:
  A. Zener voltage increases
  B. Voltage across series resistor increases
  C. Load voltage increases
  D. Zener diode stops conducting

Answer Key

• Q1: B - Zener diode is operated in reverse bias.
• Q2: B - Zener voltage remains constant over wide current range.
• Q3: B - Voltage across series resistor increases to keep Zener voltage constant.

Memory Aids

• Zener diode = voltage regulator diode.
• Constant voltage = Zener voltage.
• Series resistor protects diode by dropping excess voltage.

Photodiode

Photodiode basics

• Special p-n junction diode with transparent window.
• Operated under reverse bias.
• Generates electron-hole pairs when illuminated with photon energy > semiconductor band gap.
• Produces photocurrent proportional to light intensity.

Photodiode symbol and I-V characteristics

• Forward bias: current increases sharply after knee voltage.
• Reverse bias: very low current until breakdown voltage.
• Illumination increases reverse current (photocurrent).

Photodiode under illumination

• Light generates electron-hole pairs near depletion region.
• Photocurrent flows in reverse bias circuit.
• Current increases with light intensity.

Solved Examples

• Ex 1: What happens to photocurrent if light intensity increases?
  Solution: Photocurrent increases proportionally.
• Ex 2: Why is photodiode operated in reverse bias?
  Solution: To increase depletion region width and reduce dark current.

Practice Set

• Q1: Photodiode is operated in:
  A. Forward bias
  B. Reverse bias
  C. Both
  D. None
• Q2: Photocurrent increases with:
  A. Voltage only
  B. Light intensity
  C. Temperature
  D. Resistance
• Q3: Photodiode generates electron-hole pairs when:
  A. Photon energy < band gap
  B. Photon energy > band gap
  C. No light
  D. Forward bias only

Answer Key

• Q1: B - Photodiode is operated under reverse bias.
• Q2: B - Photocurrent is proportional to light intensity.
• Q3: B - Electron-hole pairs generated when photon energy exceeds band gap.

Memory Aids

• Photodiode = light-sensitive diode.
• Reverse bias operation for photocurrent.
• Photocurrent ∝ light intensity.

Light Emitting Diode

LED basics

• Converts electrical energy into light energy.
• Heavily doped p-n junction diode.
• Emits light under forward bias by spontaneous radiation.
• Threshold voltage higher than Si diode, varies by color.
• Reverse breakdown voltage ~5 V (low).
• Made from GaAsP for colors, GaAs for infrared.

Solved Examples

• Ex 1: What happens when LED is forward biased?
  Solution: LED emits light.
• Ex 2: Which material is used for infrared LED?
  Solution: Gallium arsenide (GaAs).

Practice Set

• Q1: LED emits light when:
  A. Reverse biased
  B. Forward biased
  C. No bias
  D. Both biases
• Q2: Typical reverse breakdown voltage of LED is:
  A. 0.7 V
  B. 5 V
  C. 12 V
  D. 50 V
• Q3: Material used for colored LEDs is:
  A. Silicon
  B. Gallium arsenide phosphide
  C. Germanium
  D. Copper

Answer Key

• Q1: B - LED emits light under forward bias.
• Q2: B - Reverse breakdown voltage of LED is about 5 V.
• Q3: B - GaAsP is used for colored LEDs.

Memory Aids

• LED = Light from forward bias.
• GaAsP for colors, GaAs for IR.
• Low reverse breakdown voltage (~5 V).

Solar Cell

Solar cell basics

• Converts solar energy into electrical energy.
• p-n junction generates emf when illuminated.
• Works on photovoltaic effect (like photodiode without external bias).
• Large junction area for higher power.

Solar cell I-V characteristics

• Short circuit current I_sc: max current at zero voltage.
• Open circuit voltage V_oc: max voltage at zero current.
• Current decreases as voltage increases between these points.

Solved Examples

• Ex 1: What is I_sc in solar cell?
  Solution: Maximum current when voltage is zero.
• Ex 2: What is V_oc in solar cell?
  Solution: Maximum voltage when current is zero.

Practice Set

• Q1: Solar cell converts:
  A. Electrical to solar energy
  B. Solar to electrical energy
  C. Heat to electrical energy
  D. Electrical to heat energy
• Q2: Photovoltaic effect means:
  A. Current flows without light
  B. emf generated by light on p-n junction
  C. emf generated by heat
  D. emf generated by magnetic field
• Q3: In solar cell, V_oc is:
  A. Voltage at max current
  B. Voltage at zero current
  C. Current at zero voltage
  D. Current at max voltage

Answer Key

• Q1: B - Solar cell converts solar energy to electrical energy.
• Q2: B - Photovoltaic effect is emf generation by light on p-n junction.
• Q3: B - V_oc is voltage at zero current.

Memory Aids

• Solar cell = light to electricity.
• Photovoltaic effect = emf by light.
• I_sc and V_oc define performance.

Solar cell basics

• Converts solar energy into electrical energy.
• p-n junction generates emf when illuminated.
• Works on photovoltaic effect (like photodiode without external bias).
• Large junction area for higher power.

Solar cell I-V characteristics

• Short circuit current \(I_{sc}\): max current at zero voltage.
• Open circuit voltage \(V_{oc}\): max voltage at zero current.
• Current decreases as voltage increases between these points.

Solved Examples

• Ex 1: What is \(I_{sc}\) in solar cell?
  Solution: Maximum current when voltage is zero.
• Ex 2: What is \(V_{oc}\) in solar cell?
  Solution: Maximum voltage when current is zero.

Practice Set

• Q1: Solar cell converts:
  A. Electrical to solar energy
  B. Solar to electrical energy
  C. Heat to electrical energy
  D. Electrical to heat energy
• Q2: Photovoltaic effect means:
  A. Current flows without light
  B. emf generated by light on p-n junction
  C. emf generated by heat
  D. emf generated by magnetic field
• Q3: In solar cell, \(V_{oc}\) is:
  A. Voltage at max current
  B. Voltage at zero current
  C. Current at zero voltage
  D. Current at max voltage

Answer Key

• Q1: B - Solar cell converts solar energy to electrical energy.
• Q2: B - Photovoltaic effect is emf generation by light on p-n junction.
• Q3: B - \(V_{oc}\) is voltage at zero current.

Memory Aids

• Solar cell = light to electricity.
• Photovoltaic effect = emf by light.
• \(I_{sc}\) and \(V_{oc}\) define performance.

Digital Electronics and Logic Gates

Signals

• Analog signal: continuous time-varying signal.
• Digital signal: discrete levels (0 and 1).

OR gate

• Two or more inputs, one output.
• Output is high if any input is high.
• Boolean expression: Y = A + B.

Solved Examples

• Ex 1: OR gate output when A=0, B=1?
  Solution: Output Y=1.
• Ex 2: Boolean expression for OR gate?
  Solution: Y = A + B.

Practice Set

• Q1: OR gate output is high when:
  A. Both inputs low
  B. Any input high
  C. Both inputs high only
  D. No input high
• Q2: Boolean expression for OR gate is:
  A. Y = A · B
  B. Y = A + B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: OR gate output for A=0, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high if any input is high.
• Q2: B - Boolean expression is Y = A + B.
• Q3: A - Output is 0 when both inputs are 0.

Memory Aids

• OR gate: Output 1 if any input 1.
• Boolean: Y = A + B.

Signals

• Analog signal: continuous time-varying signal.
• Digital signal: discrete levels (0 and 1).

OR gate

• Two or more inputs, one output.
• Output is high if any input is high.
• Boolean expression: Y = A + B.

Solved Examples

• Ex 1: OR gate output when A=0, B=1?
  Solution: Output Y=1.
• Ex 2: Boolean expression for OR gate?
  Solution: Y = A + B.

Practice Set

• Q1: OR gate output is high when:
  A. Both inputs low
  B. Any input high
  C. Both inputs high only
  D. No input high
• Q2: Boolean expression for OR gate is:
  A. Y = A · B
  B. Y = A + B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: OR gate output for A=0, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high if any input is high.
• Q2: B - Boolean expression is Y = A + B.
• Q3: A - Output is 0 when both inputs are 0.

Memory Aids

• OR gate: Output 1 if any input 1.
• Boolean: Y = A + B.

Signals

• Analog signal: continuous time-varying signal.
• Digital signal: discrete levels (0 and 1).

OR gate

• Two or more inputs, one output.
• Output is high if any input is high.
• Boolean expression: Y = A + B.

Solved Examples

• Ex 1: OR gate output when A=0, B=1?
  Solution: Output Y=1.
• Ex 2: Boolean expression for OR gate?
  Solution: Y = A + B.

Practice Set

• Q1: OR gate output is high when:
  A. Both inputs low
  B. Any input high
  C. Both inputs high only
  D. No input high
• Q2: Boolean expression for OR gate is:
  A. Y = A · B
  B. Y = A + B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: OR gate output for A=0, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high if any input is high.
• Q2: B - Boolean expression is Y = A + B.
• Q3: A - Output is 0 when both inputs are 0.

Memory Aids

• OR gate: Output 1 if any input 1.
• Boolean: Y = A + B.

Signals

• Analog signal: continuous time-varying signal.
• Digital signal: discrete levels (0 and 1).

OR gate

• Two or more inputs, one output.
• Output is high if any input is high.
• Boolean expression: \(Y = A + B\).

Solved Examples

• Ex 1: OR gate output when A=0, B=1?
  Solution: Output Y=1.
• Ex 2: Boolean expression for OR gate?
  Solution: \(Y = A + B\).

Practice Set

• Q1: OR gate output is high when:
  A. Both inputs low
  B. Any input high
  C. Both inputs high only
  D. No input high
• Q2: Boolean expression for OR gate is:
  A. \(Y = A \cdot B\)
  B. \(Y = A + B\)
  C. \(Y = \overline{A}\)
  D. \(Y = \overline{A} + \overline{B}\)
• Q3: OR gate output for A=0, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high if any input is high.
• Q2: B - Boolean expression is \(Y = A + B\).
• Q3: A - Output is 0 when both inputs are 0.

Memory Aids

• OR gate: Output 1 if any input 1.
• Boolean: \(Y = A + B\).

AND gate

AND gate basics

• Two or more inputs, one output.
• Output high only if all inputs are high.
• Boolean expression: Y = A · B.

Solved Examples

• Ex 1: AND gate output when A=1, B=0?
  Solution: Output Y=0.
• Ex 2: Boolean expression for AND gate?
  Solution: Y = A · B.

Practice Set

• Q1: AND gate output is high when:
  A. Any input high
  B. All inputs high
  C. No input high
  D. One input high
• Q2: Boolean expression for AND gate is:
  A. Y = A + B
  B. Y = A · B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: AND gate output for A=1, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only if all inputs are high.
• Q2: B - Boolean expression is Y = A · B.
• Q3: B - Output is 1 when both inputs are 1.

Memory Aids

• AND gate: Output 1 if all inputs 1.
• Boolean: Y = A · B.

AND gate basics

• Two or more inputs, one output.
• Output high only if all inputs are high.
• Boolean expression: Y = A · B.

Solved Examples

• Ex 1: AND gate output when A=1, B=0?
  Solution: Output Y=0.
• Ex 2: Boolean expression for AND gate?
  Solution: Y = A · B.

Practice Set

• Q1: AND gate output is high when:
  A. Any input high
  B. All inputs high
  C. No input high
  D. One input high
• Q2: Boolean expression for AND gate is:
  A. Y = A + B
  B. Y = A · B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: AND gate output for A=1, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only if all inputs are high.
• Q2: B - Boolean expression is Y = A · B.
• Q3: B - Output is 1 when both inputs are 1.

Memory Aids

• AND gate: Output 1 if all inputs 1.
• Boolean: Y = A · B.

AND gate basics

• Two or more inputs, one output.
• Output high only if all inputs are high.
• Boolean expression: Y = A · B.

Solved Examples

• Ex 1: AND gate output when A=1, B=0?
  Solution: Output Y=0.
• Ex 2: Boolean expression for AND gate?
  Solution: Y = A · B.

Practice Set

• Q1: AND gate output is high when:
  A. Any input high
  B. All inputs high
  C. No input high
  D. One input high
• Q2: Boolean expression for AND gate is:
  A. Y = A + B
  B. Y = A · B
  C. Y = Ā
  D. Y = Ā + B̄
• Q3: AND gate output for A=1, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only if all inputs are high.
• Q2: B - Boolean expression is Y = A · B.
• Q3: B - Output is 1 when both inputs are 1.

Memory Aids

• AND gate: Output 1 if all inputs 1.
• Boolean: Y = A · B.

AND gate basics

• Two or more inputs, one output.
• Output high only if all inputs are high.
• Boolean expression: \(Y = A \cdot B\).

Solved Examples

• Ex 1: AND gate output when A=1, B=0?
  Solution: Output Y=0.
• Ex 2: Boolean expression for AND gate?
  Solution: \(Y = A \cdot B\).

Practice Set

• Q1: AND gate output is high when:
  A. Any input high
  B. All inputs high
  C. No input high
  D. One input high
• Q2: Boolean expression for AND gate is:
  A. \(Y = A + B\)
  B. \(Y = A \cdot B\)
  C. \(Y = \overline{A}\)
  D. \(Y = \overline{A} + \overline{B}\)
• Q3: AND gate output for A=1, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only if all inputs are high.
• Q2: B - Boolean expression is \(Y = A \cdot B\).
• Q3: B - Output is 1 when both inputs are 1.

Memory Aids

• AND gate: Output 1 if all inputs 1.
• Boolean: \(Y = A \cdot B\).

NOT gate

NOT gate basics

• One input, one output.
• Output is inversion of input.
• Also called inverter.
• Boolean expression: Y = Ā.

Solved Examples

• Ex 1: NOT gate output when A=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOT gate?
  Solution: Y = Ā.

Practice Set

• Q1: NOT gate output for input 1 is:
  A. 1
  B. 0
  C. Undefined
  D. 2
• Q2: Boolean expression for NOT gate is:
  A. Y = A
  B. Y = Ā
  C. Y = A + B
  D. Y = A · B
• Q3: NOT gate has how many inputs?
  A. 1
  B. 2
  C. 3
  D. 0

Answer Key

• Q1: B - NOT gate inverts input 1 to output 0.
• Q2: B - Boolean expression is Y = Ā.
• Q3: A - NOT gate has only one input.

Memory Aids

• NOT gate = inverter.
• Output = opposite of input.

NOT gate basics

• One input, one output.
• Output is inversion of input.
• Also called inverter.
• Boolean expression: Y = Ā.

Solved Examples

• Ex 1: NOT gate output when A=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOT gate?
  Solution: Y = Ā.

Practice Set

• Q1: NOT gate output for input 1 is:
  A. 1
  B. 0
  C. Undefined
  D. 2
• Q2: Boolean expression for NOT gate is:
  A. Y = A
  B. Y = Ā
  C. Y = A + B
  D. Y = A · B
• Q3: NOT gate has how many inputs?
  A. 1
  B. 2
  C. 3
  D. 0

Answer Key

• Q1: B - NOT gate inverts input 1 to output 0.
• Q2: B - Boolean expression is Y = Ā.
• Q3: A - NOT gate has only one input.

Memory Aids

• NOT gate = inverter.
• Output = opposite of input.

NOT gate basics

• One input, one output.
• Output is inversion of input.
• Also called inverter.
• Boolean expression: Y = Ā.

Solved Examples

• Ex 1: NOT gate output when A=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOT gate?
  Solution: Y = Ā.

Practice Set

• Q1: NOT gate output for input 1 is:
  A. 1
  B. 0
  C. Undefined
  D. 2
• Q2: Boolean expression for NOT gate is:
  A. Y = A
  B. Y = Ā
  C. Y = A + B
  D. Y = A · B
• Q3: NOT gate has how many inputs?
  A. 1
  B. 2
  C. 3
  D. 0

Answer Key

• Q1: B - NOT gate inverts input 1 to output 0.
• Q2: B - Boolean expression is Y = Ā.
• Q3: A - NOT gate has only one input.

Memory Aids

• NOT gate = inverter.
• Output = opposite of input.

NOT gate basics

• One input, one output.
• Output is inversion of input.
• Also called inverter.
• Boolean expression: \(Y = \overline{A}\).

Solved Examples

• Ex 1: NOT gate output when A=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOT gate?
  Solution: \(Y = \overline{A}\).

Practice Set

• Q1: NOT gate output for input 1 is:
  A. 1
  B. 0
  C. Undefined
  D. 2
• Q2: Boolean expression for NOT gate is:
  A. \(Y = A\)
  B. \(Y = \overline{A}\)
  C. \(Y = A + B\)
  D. \(Y = A \cdot B\)
• Q3: NOT gate has how many inputs?
  A. 1
  B. 2
  C. 3
  D. 0

Answer Key

• Q1: B - NOT gate inverts input 1 to output 0.
• Q2: B - Boolean expression is \(Y = \overline{A}\).
• Q3: A - NOT gate has only one input.

Memory Aids

• NOT gate = inverter.
• Output = opposite of input.

NAND gate

NAND gate basics

• AND gate followed by NOT gate.
• Output is negation of AND output.
• Boolean expression: Ā · B̄̄.

Solved Examples

• Ex 1: NAND gate output when A=1, B=1?
  Solution: Output Y=0.
• Ex 2: Boolean expression for NAND gate?
  Solution: Y = Ā · B̄̄.

Practice Set

• Q1: NAND gate output is low when:
  A. Both inputs low
  B. Both inputs high
  C. Any input low
  D. No input high
• Q2: Boolean expression for NAND gate is:
  A. Y = A + B
  B. Y = Ā · B̄̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NAND gate output for A=0, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is low only when both inputs are high.
• Q2: B - Boolean expression is negation of AND: Ā · B̄̄.
• Q3: B - Output is 1 when any input is low.

Memory Aids

• NAND = AND + NOT.
• Output low only if all inputs high.

NAND gate basics

• AND gate followed by NOT gate.
• Output is negation of AND output.
• Boolean expression: A · B.

Solved Examples

• Ex 1: NAND gate output when A=1, B=1?
  Solution: Output Y=0.
• Ex 2: Boolean expression for NAND gate?
  Solution: Y = A · B.

Practice Set

• Q1: NAND gate output is low when:
  A. Both inputs low
  B. Both inputs high
  C. Any input low
  D. No input high
• Q2: Boolean expression for NAND gate is:
  A. Y = A + B
  B. Y = A · B
  C. Y = A · B
  D. Y = A + B
• Q3: NAND gate output for A=0, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is low only when both inputs are high.
• Q2: B - Boolean expression is negation of AND: A · B.
• Q3: B - Output is 1 when any input is low.

Memory Aids

• NAND = AND + NOT.
• Output low only if all inputs high.

NAND gate basics

• AND gate followed by NOT gate.
• Output is negation of AND output.
• Boolean expression: Ā · B̄̄.

Solved Examples

• Ex 1: NAND gate output when A=1, B=1?
  Solution: Output Y=0.
• Ex 2: Boolean expression for NAND gate?
  Solution: Y = Ā · B̄̄.

Practice Set

• Q1: NAND gate output is low when:
  A. Both inputs low
  B. Both inputs high
  C. Any input low
  D. No input high
• Q2: Boolean expression for NAND gate is:
  A. Y = A + B
  B. Y = Ā · B̄̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NAND gate output for A=0, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is low only when both inputs are high.
• Q2: B - Boolean expression is negation of AND: Ā · B̄̄.
• Q3: B - Output is 1 when any input is low.

Memory Aids

• NAND = AND + NOT.
• Output low only if all inputs high.

NAND gate basics

• AND gate followed by NOT gate.
• Output is negation of AND output.
• Boolean expression: \(\overline{A \cdot B}\).

Solved Examples

• Ex 1: NAND gate output when A=1, B=1?
  Solution: Output Y=0.
• Ex 2: Boolean expression for NAND gate?
  Solution: \(Y = \overline{A \cdot B}\).

Practice Set

• Q1: NAND gate output is low when:
  A. Both inputs low
  B. Both inputs high
  C. Any input low
  D. No input high
• Q2: Boolean expression for NAND gate is:
  A. \(Y = A + B\)
  B. \(Y = \overline{A \cdot B}\)
  C. \(Y = A \cdot B\)
  D. \(Y = \overline{A} + \overline{B}\)
• Q3: NAND gate output for A=0, B=1 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is low only when both inputs are high.
• Q2: B - Boolean expression is negation of AND: \(\overline{A \cdot B}\).
• Q3: B - Output is 1 when any input is low.

Memory Aids

• NAND = AND + NOT.
• Output low only if all inputs high.

NOR gate

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = A + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = A + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = A + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: A + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = Ā + B̄̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = Ā + B̄̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = Ā + B̄̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: Ā + B̄̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = A + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = A + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = A + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: A + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: A + B.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = A + B.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = A + B
  C. Y = A · B
  D. Y = A + B
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: A + B.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = A + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = A + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = A + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: A + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = Ā + B̄̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = Ā + B̄̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = Ā + B̄̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: Ā + B̄̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: Y = A + B̄.

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: Y = A + B̄.

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. Y = A + B
  B. Y = A + B̄
  C. Y = A · B
  D. Y = Ā + B̄
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: A + B̄.
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.

NOR gate basics

• OR gate followed by NOT gate.
• Output is negation of OR output.
• Boolean expression: \(Y = \overline{A + B}\).

Solved Examples

• Ex 1: NOR gate output when A=0, B=0?
  Solution: Output Y=1.
• Ex 2: Boolean expression for NOR gate?
  Solution: \(Y = \overline{A + B}\).

Practice Set

• Q1: NOR gate output is high when:
  A. Any input high
  B. Both inputs low
  C. Both inputs high
  D. No input low
• Q2: Boolean expression for NOR gate is:
  A. \(Y = A + B\)
  B. \(Y = \overline{A + B}\)
  C. \(Y = A \cdot B\)
  D. \(Y = \overline{A} + \overline{B}\)
• Q3: NOR gate output for A=1, B=0 is:
  A. 0
  B. 1
  C. Undefined
  D. 2

Answer Key

• Q1: B - Output is high only when both inputs are low.
• Q2: B - Boolean expression is negation of OR: \(\overline{A + B}\).
• Q3: A - Output is 0 when any input is high.

Memory Aids

• NOR = OR + NOT.
• Output high only if all inputs low.